Politecnico di Torino | Servizi per la didattica

KEYWORD

Keyword: EMBEDDED SYSTEMS

TESI ALL'ESTERO Adaptive deep learning workload for nanorobotic System-on-Chip JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

TESI AZIENDA ARDUINO: Integrazione di Simulazione Hardware-in-the-Loop (HIL) e Sviluppo di Driver Specifici per Sistemi Elettronici Personalizzati RIENTE FABRIZIO TURVANI GIOVANNA VLSILAB (VLSI theory, design and applications)

TESI AZIENDA estero

TESI ALL'ESTERO Advanced 3D-ICE Thermal Modelling: Driving Innovation in High-Performance Computing Architecture Design JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

TESI ALL'ESTERO Advanced C++14 Multithreading Modelling of Electronics Systems SANCHEZ SANCHEZ EDGAR ERNESTO SAVINO ALESSANDRO TESTGROUP - TESTGROUP

Analisi e progettazione di soluzioni innovative per l’acquisizione del segnale elettromiografico (sEMG) di superficie DEMARCHI DANILO MOTTO ROS PAOLO MiNES (Micro&Nano Electronic Systems — https://mines.polito.it)

Analisi sperimentale di pile protocollari in tempo reale CIBRARIO BERTOLOTTI IVAN IEIIT/CNR COMPUTER ENGINEERING AND NETWORKS GROUP

Approximate Computing Benchmarks for Embedded Systems SAVINO ALESSANDRO TESTGROUP - TESTGROUP

Binary Code Compression & Decompression via custom Executable Packers PRINETTO PAOLO ERNESTO GR-21 - TESTGROUP - TESTGROUP

TESI ALL'ESTERO Blood Pressure Estimation using PPG-Signal on Edge Ultra-Low Power Devices BURRELLO ALESSIO JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

TESI AZIENDA Boot Time Estimation Model & Tool TORCHIANO MARCO SOFTWARE ENGINEERING GROUP - SOFTENG

Bridging Communication Gaps: Creating a Low-Cost, Real-Time Sign Language Recognition Platform AZIMI SARAH STERPONE LUCA DAUIN - GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD

TESI AZIENDA Continuos Integration e Unit Testing con Hardware-in-the-Loop per l'Ottimizzazione della Qualità del Software Embedded (in ARDUINO) DI CARLO STEFANO SAVINO ALESSANDRO DAUIN - GR-24 - SMILIES - reSilient coMputer archItectures and LIfE Sci

Convolutional Neural Network cores towards Deep Space STERPONE LUCA GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD

TESI ALL'ESTERO Cycle-estimation through Just-in-time-compilation in MLIR BURRELLO ALESSIO JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

TESI AZIENDA Deep Learning Compiler for Smart Sensors JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

TESI ALL'ESTERO Deep Learning on Ultra-low-power Autonomous Flying Nano-drones JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

Deep learning for Biometric Identification using PPG signals JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

TESI AZIENDA Design of a C++ control application for innovative laser-based tires profiling system @Tire Profiles Italy PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

Design of a FPGA-based MPEG compression algorithm for UAV payload DI CARLO STEFANO PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

Design of a FPGA-based OCR algorithm for UAV payload control DI CARLO STEFANO PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

Design of a FPGA-based TPM Security Device DI CARLO STEFANO PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

Design of a FPGA-based processor for UAV payload control DI CARLO STEFANO PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

Design of a secure challenge-response protocol based on Physical Unclonable Functions (PUFs) for ARM platforms PRINETTO PAOLO ERNESTO GR-21 - TESTGROUP - TESTGROUP

Detecting Violence and Help Request in Real-time Through Surveillance Videos AZIMI SARAH STERPONE LUCA DAUIN - GR-05 - Aerospace and Safety Computing Lab

Detecting violence and help request in real-time through surveillance videos AZIMI SARAH STERPONE LUCA DAUIN - GR-05 - Aerospace and Safety Computing Lab

Developing a Low-Cost Real-Time Sign Language Recognition Platform Using MicroPython AZIMI SARAH STERPONE LUCA DAUIN - AEROSPACE AND SAFETY COMPUTING LAB

Development and comparison of convolutional layers implementations for deep neural networks on microcontrollers. JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

Development of an innovative Hybrid HW/SW Architecture DI CARLO STEFANO PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

Effective and secure challenge-response protocol for FPGA-based PUFs (Physical Unclonable Functions) PRINETTO PAOLO ERNESTO GR-21 - TESTGROUP - TESTGROUP

Elettronica di controllo di macchina di test per filtri aria SANSOE' CLAUDIO TRONVILLE PAOLO MARIA

Embedded Systems Security via Control-Flow Integrity PRINETTO PAOLO ERNESTO GR-21 - TESTGROUP - TESTGROUP

TESI AZIENDA Enabling Local Tightly, Global Loosely coupled Programmable Accelerators in Heterogeneous Systems BURRELLO ALESSIO JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

Enhancing dependability in FPGA-based systems for future space exploration missions DI CARLO STEFANO PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

Esplorazione e mapping su architetture eterogenee ultra-parallele: Un'analisi delle prestazioni e l'esplorazione di un algoritmo di NAS per reti neurali profonde JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

Experimental evaluation of High Level Synthesis Tools and related Design Styles definition DI CARLO STEFANO PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

Exploration of uTVM and Extension to Ultra-low-power Multi-core Platforms Based on RISC-V JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

TESI AZIENDA Extending the Open-source TVM Compiler to Deploy Deep Neural Networks on the GreenWaves' GAP9 Platform JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

FPGA-based accelerators for future Mars exploration missions DI CARLO STEFANO PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

FPGA-based implementation of Cryptographic Algorithms for the Advanced Open-source Security Platform SEcube™ PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

Fast and Secure Image Processing applications PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

Hardware-Based Schedulers approaches for Linux OS REBAUDENGO MAURIZIO SAVINO ALESSANDRO DAUIN - GR-24 - SMILIES - reSilient coMputer archItectures and LIfE Sci ELECTRONIC CAD & RELIABILITY GROUP - CAD

TESI ALL'ESTERO Hardware-Software Co-design to Deploy Deep Neural Networks on Extreme-Edge Devices JAHIER PAGLIARI DANIELE MARTINA MAURIZIO DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

Implementazione di Reti Neurali Convoluzionali a precisione ridotta JAHIER PAGLIARI DANIELE PONCINO MASSIMO GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

TESI ALL'ESTERO Improvement of on-board object identification performance of autonomous nano-drones through the use of deep learning techniques and neural architecture search. JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

Integrating convolutional neural networks accelerators in commercial MCUs JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

TESI ALL'ESTERO Integrating design space exploration in modern compilation toolchains JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

TESI ALL'ESTERO Integration of Deep-learning-powered Drone-to-drone Pose Estimation on Ultra-low-power Autonomous Flying Nano-drones JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

Internet Protocol (IP) support for SEcube™ board PRINETTO PAOLO ERNESTO GR-21 - TESTGROUP - TESTGROUP

TESI AZIENDA Logiche avanzate di controllo per macchine elettriche per trazione VIOLANTE MASSIMO DAUIN - GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD

TESI AZIENDA estero

TESI ALL'ESTERO Machine Learning-Assisted Run-Time Power and Thermal Estimation in High-Performance Computing Processors JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

Memory access optimizations for executing deep neural networks on multi-core microcontrollers JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

Multithreaded support Embedded Application on RISC-V SANCHEZ SANCHEZ EDGAR ERNESTO SAVINO ALESSANDRO ELECTRONIC CAD & RELIABILITY GROUP - CAD TESTGROUP - TESTGROUP

On the Cancer Treatment: Designing a High-perfromance data acquisition system for monitoring of particles during cancer therapy AZIMI SARAH STERPONE LUCA DAUIN - GR-05 - Aerospace and Safe Computing Lab

On the development of a Low-Cost Real-Time Sign Language Recognition Platform Using MicroPython AZIMI SARAH STERPONE LUCA DAUIN - AEROSPACE AND SAFETY COMPUTING LAB

Optimization of Deep Neural Networks through Innovative Neural Architecture Search Algorithms JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

Optimization of Transformer Deep Neural Networks on Multi-Core MCUs JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

TESI AZIENDA estero

TESI ALL'ESTERO PPACT Evaluation of a Vector Functional Unit JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

TESI AZIENDA estero

TESI ALL'ESTERO Pioneering ARM DSU big.LITTLE Cluster Optimization JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

TESI AZIENDA Progettazione di demodulatori digitali per la comunicazione PowerReceiver-to-PowerTransmitter nei sistemi di trasferimento di potenza wireless RIENTE FABRIZIO TURVANI GIOVANNA VLSILAB (VLSI theory, design and applications)

Secure Data Management in e-Health Applications through the Advanced Open-source Security Platform SEcube™ PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

Secure Device Drivers Development for the Advanced Open-Source Security Platform SEcube™ PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

Secure Edge-Computing exploiting Artificial Intelligence Applications PRINETTO PAOLO ERNESTO GR-21 - TESTGROUP - TESTGROUP

Secure File System Development for the Advanced Open-source Security Platform SEcube™ PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

Secure Internet-of-Things (IoT) applications in Industry 4.0 PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

Securing IoT Communications via the SEcube™ Platform PRINETTO PAOLO ERNESTO GR-21 - TESTGROUP - TESTGROUP

Self-optimizing neural networks for efficient person localization and tracking LAVAGNO LUCIANO LAZARESCU MIHAI TEODOR Sensing and processing microelettronica

TESI AZIENDA estero

TESI ALL'ESTERO Self-supervised Learning for Wearable-based Activity Recognition JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

TESI ALL'ESTERO Slimmable Neural Networks for Perception aboard Nano-Drones BURRELLO ALESSIO JAHIER PAGLIARI DANIELE DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA ELECTRONIC DESIGN AUTOMATION - EDA GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA

Software Development Kit (SDK) Development for the Advanced Open-source Security Platform SEcube™ PRINETTO PAOLO ERNESTO TESTGROUP - TESTGROUP

TESI AZIENDA Studio e analisi delle prestazioni di volante multi-sensore RIENTE FABRIZIO VLSILAB (VLSI theory, design and applications)

Studio e riprogettazione dell'interfaccia utente di controllo dei sistemi didattici audiovisivi CORNO FULVIO DE RUSSIS LUIGI DAUIN - GR-10 - Intelligent and Interactive Systems - e-LITE

Study and development of RUST-based Operating System for Embedded Systems AZIMI SARAH DE SIO CORRADO STERPONE LUCA ASAC Lab - Aerospace, Safety, and Computing Lab ELECTRONIC CAD & RELIABILITY GROUP - CAD

Study and development of a Reconfigurable-based Adaptive Artifical Intelligence Core STERPONE LUCA GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD

Sviluppo di algoritmi di monitoraggio su sistemi Embedded con architerttura ARM per applicazioni ferroviarie. BOSSO NICOLA Laboratorio di costruzione e dinamica ferroviaria

Sviluppo di un ambiente basato su QEMU per la caratterizzazione affidabilistica di sistemi on chip Xilinx BERNARDI PAOLO GR-05 - ELECTRONIC CAD & RELIABILITY GROUP - CAD

Sviluppo di un sistema open source per l'automazione delle misure di test di superfici e materiali nanostrutturati in laboratorio JANNER DAVIDE LUCA AA - Glasses, Ceramics and Composites

SystemC-AMS extensions to improve the design of modern systems VINCO SARA DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA