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Keyword: HARDWARE ACCELERATORS

Design of a hardware module for online learning on Spiking Neural Networks, with partial reconfiguration on FPGA.  DI CARLO STEFANO  SAVINO ALESSANDRO  DAUIN - GR-24 - SMILIES - reSilient coMputer archItectures and LIfE Sci
Design of high performance memory systems for Datacenter Embedded Systems  STERPONE LUCA  DAUIN - AEROSPACE AND SAFETY COMPUTING LAB
Development of a tool for the optimization of Spiking Neural Networks (SNN) for the development of dedicated hardware accelerators on FPGA platform to apply in IoT and edge-computing environments.  DI CARLO STEFANO  SAVINO ALESSANDRO  DAUIN - GR-24 - SMILIES - reSilient coMputer archItectures and LIfE Sci
Exploration and mapping on ultra-parallel heterogeneous architectures: A performance analysis and exploration of a NAS algorithm for deep neural networks  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
esteroTESI ALL'ESTERO Hardware-Software Co-design to Deploy Deep Neural Networks on Extreme-Edge Devices  JAHIER PAGLIARI DANIELE  MARTINA MAURIZIO  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
esteroTESI ALL'ESTERO Integrating design space exploration in modern compilation toolchains  JAHIER PAGLIARI DANIELE  DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA  ELECTRONIC DESIGN AUTOMATION - EDA  GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Optimization of a hardware accelerator for Spiking Neural Networks for low power applications at the edge.  DI CARLO STEFANO  SAVINO ALESSANDRO  DAUIN - GR-24 - SMILIES - reSilient coMputer archItectures and LIfE Sci
Porting of a hardware accelerator for Spiking Neural Networks and its software driver on a Xilinx PynQ board for edge applications.  DI CARLO STEFANO  SAVINO ALESSANDRO  DAUIN - GR-24 - SMILIES - reSilient coMputer archItectures and LIfE Sci