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Keyword: LOW POWER
TESI ALL'ESTERO
Adaptive deep learning workload for nanorobotic System-on-Chip
JAHIER PAGLIARI DANIELE
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
TESI AZIENDA
Deep Learning Compiler for Smart Sensors
JAHIER PAGLIARI DANIELE
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
TESI ALL'ESTERO
Deep Learning on Ultra-low-power Autonomous Flying Nano-drones
JAHIER PAGLIARI DANIELE
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Deep learning for Biometric Identification using PPG signals
JAHIER PAGLIARI DANIELE
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
TESI AZIENDA
Design of ultra low power bandgap voltage reference
CROVETTI PAOLO STEFANO
Automotive Division Group (STM) - Advance AMS and Power ICs (Polito)
Development and comparison of convolutional layers implementations for deep neural networks on microcontrollers.
JAHIER PAGLIARI DANIELE
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
TESI ALL'ESTERO
Dynamic frequency up-conversion technique for piezoelectric energy harvester
GRAZIANO MARIAGRAZIA
VLSILAB (VLSI theory, design and applications)
Exploration of uTVM and Extension to Ultra-low-power Multi-core Platforms Based on RISC-V
JAHIER PAGLIARI DANIELE
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
TESI AZIENDA
Extending the Open-source TVM Compiler to Deploy Deep Neural Networks on the GreenWaves' GAP9 Platform
JAHIER PAGLIARI DANIELE
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
TESI AZIENDA
TESI ALL'ESTERO
Green-Five: An open-source system-level power analysis method for energy efficient RISC-V ISA
RIENTE FABRIZIO
EC à IMT Atlantique/Lab-STICC, Brest, France.
VLSI THEORY, DESIGN AND APPLICATIONS (VLSILAB)
TESI ALL'ESTERO
Hardware-Software Co-design to Deploy Deep Neural Networks on Extreme-Edge Devices
JAHIER PAGLIARI DANIELE
MARTINA MAURIZIO
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
TESI ALL'ESTERO
Integrating Design Space Exploration in Modern Compilation Toolchains for Deep Learning
JAHIER PAGLIARI DANIELE
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Integrating convolutional neural networks accelerators in commercial MCUs
JAHIER PAGLIARI DANIELE
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
TESI ALL'ESTERO
Integration of Deep-learning-powered Drone-to-drone Pose Estimation on Ultra-low-power Autonomous Flying Nano-drones
JAHIER PAGLIARI DANIELE
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Memory access optimizations for executing deep neural networks on multi-core microcontrollers
JAHIER PAGLIARI DANIELE
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Optimization of Deep Neural Networks through Innovative Neural Architecture Search Algorithms
JAHIER PAGLIARI DANIELE
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Optimization of Transformer Deep Neural Networks on Multi-Core MCUs
JAHIER PAGLIARI DANIELE
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Optimization of a hardware accelerator for Spiking Neural Networks for low power applications at the edge.
DI CARLO STEFANO
SAVINO ALESSANDRO
DAUIN - GR-24 - SMILIES - reSilient coMputer archItectures and LIfE Sci
Resilient FPGA implementations of Deep Neural Networks
CASU MARIO ROBERTO
LAVAGNO LUCIANO
LAZARESCU MIHAI TEODOR
VLSILAB (VLSI theory, design and applications)
TESI AZIENDA
TESI ALL'ESTERO
Self-supervised Learning for Wearable-based Activity Recognition
JAHIER PAGLIARI DANIELE
DAUIN - GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
ELECTRONIC DESIGN AUTOMATION - EDA
GR-06 - ELECTRONIC DESIGN AUTOMATION - EDA
Tiny Machine Learning for for IoT systems
RIENTE FABRIZIO
TURVANI GIOVANNA
VLSILAB (VLSI theory, design and applications)
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