| KEYWORD |
Study and development of enhanced SRAM configuration memory for the new generation of reconfigurable SoC
keywords AEROSPACE, FPGA, SATELLITE, TEST
Reference persons MATTEO SONZA REORDA, LUCA STERPONE
Research Groups ELECTRONIC CAD & RELIABILITY GROUP - CAD
Thesis type RESEARCH, INNOVATIVE
Description The goal of the thesis is the development and implementation of configuration encoding on the state-of-the-art SRAM-based
FPGA for aerospace application immune to radiation effects (SIRF device). The thesis, done in collaboration with
Xilinx USA, consists in a weekly collaboration with Xilinx (generally done on wednesday) for the evaluation of
the activity progress and consits on implement CORDIC cores module within the SIRF SRAM-based FPGA and analyzing
the robustness using state-of-the-art commercial tools available (VERI-Place) providing the expected error rate
characterization. The design will be performed using the Xilinx ISE tool deployed for Aerospace Application and
the results will be included in the Xilinx SEE Consortium including NASA and JPL.
Required skills Good knowledge of VHDL, C and C++
Notes The thesis is performed in collaboration with Xilinx USA
Deadline 30/11/2015
PROPONI LA TUA CANDIDATURA